WAVE510 is a high-performance UHD HEVC/H.265, hardware decoder IP that is targeted for any devices capable of playing up to 4K HEVC's MAIN/MAIN10 video with optimized size. This core IP is able to decode any resolution up to 8192x4096 and guarantees real-time performance for decoding 4K60fps @450MHz. WAVE510 provides highly optimized enhanced performance for high-end UHD SoC for memory bandwidth loading and excellent power management.

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Performance

• HEVC Main/Main10/Main Still Picture (MSP) Profile @L5.1 High-tier; 4K60fps @450MHz

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Interface

• 32-bit AMBA3 APB bus​

• 128-bit AMBA3 AXI buses

• Primary AXI interface and an optional secondary AXI interface

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Features

• Frame buffer compression​

• 3DNR

• Latency tolerance

• Configurable IP

• Programmability

• Low power consumption

• Frame-based processing

• Handling multi-instances

WAVE510A is the world's first commercial AV1 HW decoder IP and is one of the most advanced cores which support the next generation AV1 standard. WAVE510A is an AV1 decoder IP core that is only dedicated to AV1, a patent royalty-free video codec supported by Google, Apple, and many other global CPs (content providers) and is known for approximately 30% better performance than HEVC. WAVE510A is optimally designed and architected to support real-time AV1 video decoding up to 4K60fps @450MHz with a single core. A specialized hardware block called CFrame™ is integrated into the video IP and with compression of reconstructed frames for future reference, this IP core can significantly reduce bus bandwidth by 50% on average while accessing frame data effectively in the external memory. WAVE510A is suitable for applications across various industry segments including ultra-high-definition (UHDTVs), set-top boxes (STBs), virtual reality devices, augmented reality devices, smartphones, tablets, and any others with super-high resolution.

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Performance

• AV1 Main Profile @L5.1; 4K60fps @450MHz

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Interface

• 32-bit AMBA3 APB bus​

• 128-bit AMBA3 AXI buses

• Primary AXI interface and an optional secondary AXI interface

​

Features

• Frame buffer compression​

• 3DNR

• Latency tolerance

• Configurable IP

• Programmability

• Low power consumption

• Frame-based processing

• Handling multi-instances

WAVE511 is a 4K multi-format decoder IP to support both HEVC/H.265 and AVC/H.264 video formats which provide high-performance decode capability up to 4K60fps @450MHzwith a single-core architecture and an optimized silicon area for 4K Ultra-HD applications. This IP core is able to decode any resolution up to 8192x4096 and guarantees real-time performance for decoding 4K60fps. 

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Performance (4K60fps @450MHz)

• HEVC/H.265 Main/Main10 Profile @L5.1 High-tier

• AVC/H.264 Baseline/Constrained Baseline/Main/High/High 10 Profiles @L5.2

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Interface

• 32-bit AMBA3 APB bus​

• 128-bit AMBA3 AXI buses

• Primary AXI interface and an optional secondary AXI interface

​

Features

• Frame buffer compression​

• Latency tolerance

• Configurable IP

• Programmability

• Low power consumption

• Frame-based processing

• Handling multi-instances

• Trick mode

• Down-scaler

WAVE512 is a high-performance UHD HEVC/H.265 and VP9 hardware decoder IP that is targeted for any devices capable of playing up to 4K HEVC's MAIN/MAIN10 or VP9 Profile2(HBD) video. WAVE512 is able to decode any resolution up to 8192x4096 and guarantees real-time performance for decoding 4K60fps @450MHz based on its sophisticated, latency tolerant HW architecture. This IP is highly optimized for memory bandwidth loading and excellent power management. 

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Performance (4K60fps @450MHz)

• HEVC/H.265 Capable of decoding HEVC Main/Main10 Profile @L5.1 High-tier

• VP9 Profile 0/Profile 2 (HBD); Max resolution: 8192x4096; Min resolution: 8x8

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Interface

• 32-bit AMBA3 APB bus for host CPU system control

• 128-bit AMBA3 AXI buses for data transfer

• 2 128-bit AXI buses available (accessing external memory and on-chip SRAM memory)

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Features

• Frame buffer compression​

• Latency tolerance

• Configurable IP

• Programmability

• Low power consumption

• Frame-based processing

• Handling multi-instances

• Trick mode

WAVE515 is a high-performance multi-decoder IP that is targeted for any devices capable of playing up to 4K HEVC's MAIN/MAIN10, AVS2, or VP9 Profile2 (HBD) video. This IP core is able to decode any resolution up to 8192x4096 and guarantees real-time performance for decoding 4K60fps @450MHz. In addition to its superior 4K60fps performance, the WAVE515 provides maximum bandwidth efficiency and exceptionally low power consumption. WAVE515 is suitable for applications across various industry segments, including ultra-high-definition televisions (UHDTVs), set-top boxes(STBs), VR/AR devices, smartphones, tablets, and others with super-high resolution.

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Performance (4K60fps @450MHz)

• HEVC/H.265 Main/Main10 Profile @L5.1 High-tier

• VP9 Profile 0/Profile 2 (HBD)

• AVS2 Main10 Profile, Level 8.0.60

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Interface

• 32-bit AMBA3 APB bus

• 128-bit AMBA3 AXI buses

• Primary AXI interface and an optional secondary AXI interface

​

Features

• Frame buffer compression​

• Latency tolerance

• Configurable IP

• Programmability

• Low power consumption

• Frame-based processing

• Handling multi-instances

• Trick mode

WAVE517 is the world’s first real-time multi-standard decoder, including AV1, hardware IP. This IP core is a multi-standard decoder HW IP, which is optimally designed and architected to support real-time 4K Ultra-High-Definition (UHD) video decoding in HEVC/H.265, AVC/H.264, VP9, AVS2, and AV1 standards. The pre-release of multi-standard HW IP, WAVE517, is targeting 4K Ultra-High-Definition (UHD), which is the first in the industry to support a large portion of almost every codec standard in the market, including the next generation AV1 standard. The WAVE517 is architected for real-time video decoding capability of 4K60fps content at 450MHz in HEVC/H.265, AVC/H.264, VP9, AVS2, and AV1 standards. In order to support 8K60fps, 900MHz clock and multiple cores are required and may achieve up to 8K (8Kx4K) resolution. In addition, WAVE517 is highly optimized for memory bandwidth loading and power management. A specialized hardware block CFrame™ is integrated into WAVE517 to compress reconstructed frames for future reference. As a result, WAVE517 can significantly reduce bus bandwidth by 50% on average while accessing frame data effectively in the external memory.

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Performance (4K60fps @450MHz)

• AV1 Main Profile @L5.1

• HEVC/H.265 Main/Main10 Profile @L5.1 High-tier

• AVC/H.264 BP/CBP/MP/HP/High 10 Profiles @L5.2

• VP9 Profile 0/ Profile 2 @L5.1

• AVS2 Main/Main10 Profile @L8.0.60

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Interface

• 32-bit AMBA3 APB bus

• 128-bit AMBA3 AXI buses

• Primary AXI interface and an optional secondary AXI interface

​

Features

• Frame buffer compression​

• Latency tolerance

• Configurable IP

• Programmability

• Low power consumption

• Frame-based processing

• Handling multi-instances

• Trick mode

• Down-scaler