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Video Decoder IPs


The WAVE537 is a dual-CORE decoder IP, architected for decoding video to 4K120fps, 8K30fps, 8K60fps @900MHz in HEVC/H.265 (dual-CORE), AVC/H.264, VP9, AVS2, AV1 (dual-CORE) standard formats in real-time with the most optimized size and stable decoding performance. The WAVE537 is cost-effective as it is architected to pick out and reuse sharable blocks from various codec standards and apply them to the common blocks, in which the IP architecture becomes streamlined with minimum logics and memories fitting into small-sized SoCs. The IP provides maximum bandwidth efficiency and exceptionally low power consumption across all connected devices. With Chips&Media's proprietary buffer compression technology called CFrame, it saves from 50  percent bandwidth access to memory on average. The WAVE537 is suitable for applications across various industry segments, including ultra-high-definition televisions (UHDTVs), wearable devices, set-top boxes(STBs), VR·ARs, smartphones, tablets, data servers, automotive, IP cam/surveillance, driving recorders, infotainments, and any others with super-high resolution. 

Performance (8K60fps @900MHz)

  • HEVC/H.265 Main Profile @L5.1

  • AVC/H.264 BP/CBP/MP/HP Profile @L5.2

  • AV1 Main Profile @L5.1

  • VP9 Profile 0/Profile 2 (HBD) @L5.1

  • AVS2 Main 10 Profile @L8.0.60


  • 32-bit AMBA2 APB bus​

  • 128-bit AMBA3 AXI buses

  • Primary AXI interface and an optional secondary AXI interface


  • Frame buffer compression

  • Long burst write

  • Scalable hardware architecture

  • 3DNR

  • Low delay encoding/decoding

  • Latency tolerance

  • Programmability

  • Low power consumption

  • Frame-based processing

  • Handling multi-instances

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